{"id":1339,"date":"2020-02-01T15:28:12","date_gmt":"2020-02-01T15:28:12","guid":{"rendered":"http:\/\/retroramblings.net\/?page_id=1339"},"modified":"2021-01-22T23:46:06","modified_gmt":"2021-01-22T23:46:06","slug":"eightthirtytwo","status":"publish","type":"page","link":"http:\/\/retroramblings.net\/?page_id=1339","title":{"rendered":"EightThirtyTwo"},"content":{"rendered":"\n<p>EightThirtyTwo is an experimental CPU core with 8-bit instruction words and 32-bit registers.<\/p>\n\n\n\n<p>The main design goals are modest logic footprint and minimum possible use\nof BlockRAM &#8211; which is achieved by (a) aiming to maximise code density,\nand (b) having the register file implemented as logic rather than BlockRAM.<\/p>\n\n\n\n<p>In order to maximise code density, the instruction words are only 1-byte\nlong, with only three bits devoted to the operand.  This allows one of\neight general purpose registers to be selected, while a ninth &#8220;tmp&#8221; register\nprovides an implicit second operand.<\/p>\n\n\n\n<p>There is optional support for dual threads, and the CPU offers full load\/store alignment, build-time switchable endian-ness and 32 x 32 to 64 bit multiplication.<\/p>\n\n\n\n<p>The project is hosted on GitHub in two parts:<\/p>\n\n\n\n<ul class=\"wp-block-list\"><li>The <a href=\"https:\/\/github.com\/robinsonb5\/EightThirtyTwo\">CPU and toolchain<\/a>, and<\/li><li><a href=\"https:\/\/github.com\/robinsonb5\/EightThirtyTwoDemos\">Some demo projects<\/a> which pull in the CPU as a submodule.<\/li><\/ul>\n\n\n\n<p>I have blogged about the creation of this CPU, so for those interested in reading about the process, this page serves as a sort of index.<\/p>\n\n\n\n<ul class=\"wp-block-list\"><li><a href=\"http:\/\/retroramblings.net\/?p=1257\">Part 1 &#8211; A Whole New ISA?<\/a><\/li><li><a href=\"http:\/\/retroramblings.net\/?p=1263\">Part 2 &#8211; Choosing the Instruction Set<\/a><\/li><li><a href=\"http:\/\/retroramblings.net\/?p=1268\">Part 3 &#8211; Nailing down the instruction set<\/a><\/li><li><a href=\"http:\/\/retroramblings.net\/?p=1272\">Part 4 &#8211; How to avoid writing an assembler<\/a><\/li><li><a href=\"http:\/\/retroramblings.net\/?p=1277\">Part 5 &#8211; Assembly language is all very well&#8230;<\/a><\/li><li><a href=\"http:\/\/retroramblings.net\/?p=1284\">Part 6 &#8211; Evolving the ISA&#8230;<\/a><\/li><li><a href=\"http:\/\/retroramblings.net\/?p=1294\">Part 7 &#8211; Some real-life code&#8230;<\/a><\/li><li><a href=\"http:\/\/retroramblings.net\/?p=1299\">Part 8 &#8211; Hello World! In hardware!<\/a><\/li><li><a href=\"http:\/\/retroramblings.net\/?p=1303\">Part 9 &#8211; INTER-handling-RUPTS<\/a><\/li><li><a href=\"http:\/\/retroramblings.net\/?p=1310\">Part 10 &#8211; Two threads are better than one<\/a><\/li><li><a href=\"http:\/\/retroramblings.net\/?p=1315\">Part 11 &#8211; We have printf()<\/a><\/li><li><a href=\"http:\/\/retroramblings.net\/?p=1322\">Part 12 &#8211; Good news&#8230; and bad news<\/a><\/li><li><a href=\"http:\/\/retroramblings.net\/?p=1327\">Part 13 &#8211; That&#8217;s more like it!<\/a><\/li><li><a href=\"http:\/\/retroramblings.net\/?p=1330\">Part 14 &#8211; Efficient sign extension<\/a><\/li><li><a href=\"http:\/\/retroramblings.net\/?p=1351\">Part 15 &#8211; Time to stop being lazy!<\/a><\/li><li><a href=\"http:\/\/retroramblings.net\/?p=1355\">Part 16 &#8211; Assembling is the easy bit!<\/a><\/li><li><a href=\"http:\/\/retroramblings.net\/?p=1359\">Part 17 &#8211; Mitigating Hazards<\/a><\/li><li><a href=\"http:\/\/retroramblings.net\/?p=1365\">Part 18 &#8211; Threading Revisited<\/a><\/li><li><a href=\"http:\/\/retroramblings.net\/?p=1388\">Part 19 &#8211; References and a design flaw<\/a><\/li><li><a href=\"http:\/\/retroramblings.net\/?p=1402\">Part 20 &#8211; Endian matters, linker libraries and constructors.<\/a><\/li><li><a href=\"http:\/\/retroramblings.net\/?p=1407\">Part 21 &#8211; Further adventures with JTAG<\/a><\/li><li><a href=\"http:\/\/retroramblings.net\/?p=1414\">Part 22 &#8211; The Totally Unscientific Code Density Competition<\/a><\/li><li><a href=\"http:\/\/retroramblings.net\/?p=1503\">Part 23 &#8211; Bug fixes and a new instruction<\/a><\/li><\/ul>\n","protected":false},"excerpt":{"rendered":"<p>EightThirtyTwo is an experimental CPU core with 8-bit instruction words and 32-bit registers. The main design goals are modest logic footprint and minimum possible use of BlockRAM &#8211; which is achieved by (a) aiming to maximise code density, and (b) &hellip; <a href=\"http:\/\/retroramblings.net\/?page_id=1339\">Continue reading <span class=\"meta-nav\">&rarr;<\/span><\/a><\/p>\n","protected":false},"author":2,"featured_media":0,"parent":1344,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"footnotes":""},"class_list":["post-1339","page","type-page","status-publish","hentry"],"_links":{"self":[{"href":"http:\/\/retroramblings.net\/index.php?rest_route=\/wp\/v2\/pages\/1339","targetHints":{"allow":["GET"]}}],"collection":[{"href":"http:\/\/retroramblings.net\/index.php?rest_route=\/wp\/v2\/pages"}],"about":[{"href":"http:\/\/retroramblings.net\/index.php?rest_route=\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"http:\/\/retroramblings.net\/index.php?rest_route=\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"http:\/\/retroramblings.net\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=1339"}],"version-history":[{"count":9,"href":"http:\/\/retroramblings.net\/index.php?rest_route=\/wp\/v2\/pages\/1339\/revisions"}],"predecessor-version":[{"id":1507,"href":"http:\/\/retroramblings.net\/index.php?rest_route=\/wp\/v2\/pages\/1339\/revisions\/1507"}],"up":[{"embeddable":true,"href":"http:\/\/retroramblings.net\/index.php?rest_route=\/wp\/v2\/pages\/1344"}],"wp:attachment":[{"href":"http:\/\/retroramblings.net\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=1339"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}