{"id":162,"date":"2012-08-26T12:13:58","date_gmt":"2012-08-26T12:13:58","guid":{"rendered":"http:\/\/retroramblings.net\/?p=162"},"modified":"2012-08-26T12:17:05","modified_gmt":"2012-08-26T12:17:05","slug":"latching-power-circuit-in-the-flesh","status":"publish","type":"post","link":"http:\/\/retroramblings.net\/?p=162","title":{"rendered":"Latching power circuit – in the flesh!"},"content":{"rendered":"

Having breadboarded the latching power circuit from my last post and found it works pretty well, I’ve made a more permanent version that plugs directly onto the headers on my Cyclone 3 board.\u00a0 While I’d normally build something like this on stripboard, it’s not really appropriate for this project because the pins on the 40-pin headers are only one row of holes apart.\u00a0 Therefore I’ve used matrix board this time around.<\/p>\n

This is the case I plan to use to house this project.\u00a0 It’s the case from an old, dead Acer Aspire L320 – a nice looking machine that, unfortunately, seems to have insufficient chipset cooling, so tends to die a horrible death.\u00a0 Dead ones crop up on Ebay fairly frequently, and with a little bit of cleaning up and removing of label residue, they’re an ideal housing for a project like this one.<\/p>\n

\"\"<\/a><\/p>\n

Behind the power button is a little circuit board with four LEDs (actually only three on mine, but space for a fourth) and the actual power button switch.\u00a0 I rewired this board slightly – removed the blue LEDs (*please* people, can we get over the blue LED thing now!) and replaced them with green, yellow, orange and red ones.\u00a0 I also wired the LED anodes in common, to keep the component count down.\u00a0 The common anode will be fed from 3.3v through a small resitor, then the four LEDs’ cathodes will be tied directly to FPGA pins.\u00a0 When the respective FPGA pin is low, the LED will light up.<\/p>\n

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The obvious problem with this arrangement is that when more than one LED is lit, the current will be shared between them, making them dimmer – to avoid this, I’ll use a pulse-width modulation system, giving each LED a 25% duty cycle, and alternating between them, so no two LEDs will be lit at the same time.<\/p>\n

The VHDL code for this is as follows:<\/p>\n

library ieee;\r\nuse ieee.std_logic_1164.all;\r\nuse ieee.std_logic_unsigned.all;\r\nuse IEEE.numeric_std.ALL;\r\n\r\nentity statusleds_pwm is\r\n\u00a0\u00a0 \u00a0port(\r\n\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0clk : in std_logic;\r\n\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0leds_in : in std_logic_vector(3 downto 0);\r\n\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0leds_out : out std_logic_vector(3 downto 0)\r\n\u00a0\u00a0 \u00a0);\r\nend statusleds_pwm;\r\n\r\narchitecture rtl of statusleds_pwm is\r\n\u00a0\u00a0 \u00a0signal counter : unsigned(18 downto 0);\r\nbegin\r\n\u00a0\u00a0 \u00a0process(clk)\r\n\u00a0\u00a0 \u00a0begin\r\n\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0if rising_edge(clk) then\r\n\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0counter <= counter+1;\r\n\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0if counter(16 downto 0)=X\"0000\"&\"0\" then\r\n\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0leds_out<=\"1111\";\r\n\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0case counter(18 downto 17) is\r\n\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0when \"00\" =>\r\n\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0leds_out(0)<=not leds_in(0);\r\n\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0when \"01\" =>\r\n\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0leds_out(1)<=not leds_in(1);\r\n\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0when \"10\" =>\r\n\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0leds_out(2)<=not leds_in(2);\r\n\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0when \"11\" =>\r\n\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0leds_out(3)<=not leds_in(3);\r\n\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0end case;\r\n\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0end if;\r\n\u00a0\u00a0 \u00a0\u00a0\u00a0 \u00a0end if;\r\n\u00a0\u00a0 \u00a0end process;\r\nend architecture;<\/pre>\n
As I mentioned in my previous post, the Cyclone 3 board I’m using has four general purpose IO headers, but two of these headers share FPGA pins with the RAM chips, so on a board like mine that’s populated with two RAM chips, there are only a handful of available IOs on headers J3 and J4.\u00a0 There are, however, enough to run my latching power circuit, the LEDs, and a couple left over which I’ll use for an RS232 port.<\/p>\n
The following matrix board layout describes a board which connects directly to headers J3 and J4 on the FPGA board, leaving the IO-rich J1 and J2 free for A\/V, SD Card and joystick interfaces.<\/p>\n
\"\"<\/a><\/p>\n
I’m currently waiting for delivery of some MAX3232s (MAX232 variant that runs from 3.3v) – so that part of the board isn’t yet built – but the power aspect is built and working. \"\"<\/a><\/p>\n
(The above is not quite the final version – I moved one signal to a different IO pin, and added a small capacitor between LED+ and GND.)<\/p>\n
\"\"<\/a><\/p>\n","protected":false},"excerpt":{"rendered":"
Having breadboarded the latching power circuit from my last post and found it works pretty well, I’ve made a more permanent version that plugs directly onto the headers on my Cyclone 3 board.\u00a0 While I’d normally build something like this … Continue reading →<\/span><\/a><\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"open","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[4],"tags":[],"class_list":["post-162","post","type-post","status-publish","format-standard","hentry","category-fpga"],"_links":{"self":[{"href":"http:\/\/retroramblings.net\/index.php?rest_route=\/wp\/v2\/posts\/162","targetHints":{"allow":["GET"]}}],"collection":[{"href":"http:\/\/retroramblings.net\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"http:\/\/retroramblings.net\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"http:\/\/retroramblings.net\/index.php?rest_route=\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"http:\/\/retroramblings.net\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=162"}],"version-history":[{"count":8,"href":"http:\/\/retroramblings.net\/index.php?rest_route=\/wp\/v2\/posts\/162\/revisions"}],"predecessor-version":[{"id":174,"href":"http:\/\/retroramblings.net\/index.php?rest_route=\/wp\/v2\/posts\/162\/revisions\/174"}],"wp:attachment":[{"href":"http:\/\/retroramblings.net\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=162"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"http:\/\/retroramblings.net\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=162"},{"taxonomy":"post_tag","embeddable":true,"href":"http:\/\/retroramblings.net\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=162"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}