The current publicly available sources for the Minimig project only support the ECS chipset, there’s not yet any support for AGA. (The Minimig core used by the FPGA Replay board *does*, apparently, have robust AGA support, but the sources haven’t yet been released to the wider world.)
So I decided to have a go at adding a little AGA functionality myself.
Compared with the ECS chipset, the AGA chipset doesn’t actually add that much complexity. The extra features are basically:
- Colourtable extended from 32 entries to 256. There are still only 32 colourtable registers, and they’re accessed in banks, which are selected in another register.
- Colourtable entries are now 24-bit deep rather than just 12. A select bit in another register determines whether colourtable writes go to the most- or least-significant 12 bits.
- There are now 8 bitplanes instead of 6
- Bitplane data can be exclusive-ored with a mask value. This enables some neat tricks with “copper chunky” modes, among other things.
- Sprites can be high-res
- Data can now be fetched 32-bits at a time, double-pumped or both, giving an effective 64-bit datapath.
The easiest place to start is the colourtables, which in the present Minimig design are stored in registers. Since the colourtable was about to balloon from 32 12-bit entries to 256 24-bit entries, I migrated the colourtable to a pair of M4Ks – one to take the upper 12-bits of each colour, the other to take the lower 12-bits.
I also implemented enough of the BPLCON3 and BPLCON4 registers to support colourtable bank selection and masking.
I’ve also created a small Copperlist demo in ADF format for testing, which can be found here.
This demo simply uses lower-bit entries and palette masking as a test – the following screenshot shows how it looks under ECS and under AGA.
(Note that while the colourtable entries store 24-bits, they’re still only displayed as 12-bit, because that’s all the DE1 Board’s VGA output can handle without extra dithering, which will come later.)
Please note that this is highly experimental – there are timing inaccuracies compared with the real chipset, extra-half-brite mode is currently broken. (and the normal Minimig boot text is missing as a result of another experiment to reduce the size of the boot ROM!)