In the Christmas break I’ve finally found a little bit of time to tinker with FPGAs again. Not enough to tackle anything major, but I’ve done a little bit of bug fixing on the OneChipMSX core.
Or so I thought.
A problem with the OneChipMSX core on newer MIST boards was brought to my attention, and when it became clear that the affected boards all had a different revision of SDRAM chip that’s where I started looking. I thought I had timing constraints for the SDRAM in place, but it turns out that wasn’t the case, so having added constraints I built the core, sent it to a tester who had both a new and old revision board, and was told all was well.
I’ve since had a report that the new version has problems with disk errors once MSX DOS is booted, and while I can’t reproduce that problem with the released revision of the core, I’ve since made some changes to reset handling so that it’s finally possible to hard-reset the core and clear a loaded ROM without power-cycling – and now I can’t build a core for the MIST that doesn’t give MSX DOS errors!
Building for DE2 results in a core that works just fine. Building for DE1 results in a core that hangs on loading the BIOS – which is exactly the symptom the newer revision MIST boards were showing – but I don’t have any block RAM left so I can’t use SignalTap to diagnose it!
So clearly I’m getting rusty! I’m hoping I’ll find time before going back to work to figure out what’s going on!
Welcome back! (*)
(*) well, actually, this is *your* blog, so “welcome back” is somewhat odd – but no other catchy phrase comes to my mind that means “it’s really nice to see that you found some time for your FPGA projects!”