The insanity continues…

Building on my previous rather perverse mashup of Amiga and ZPU technology, my old Amiga 500 motherboard currently has not just one, but *two* ZPU processors!


One of these is running a general purpose SDRAM test program.  This is general enough to run unmodified on a number of different FPGA boards; the price for this generality is that the program has no display capabilities, and simply sends its output to a UART-style debug channel.

Therefore, the second ZPU’s job is to receive data from this debug channel and print what it receives to the Amiga’s screen.

The SDRAM tester program performs a number of checks on the RAM:

  • The simplest is a straightforward sanity check, writing a handful of bit patterns to memory location 0, reading it back and making sure it hasn’t been corrupted.  It actually reads it back twice, with a string of reads long enough to clear the SDRAM cache in between the two.  Thus the sanity check tests the cache as well as the data lines of the SDRAM chip.
  • The next test is an address aliasing check.  If there are bad solder joints on the SDRAM chip’s address lines, the RAM will appear to work fine for small datasets, but the bad joint will effectively split the RAM in half, making one half inaccessible, and the other half appear twice in the memory map.  To check for this, I write a 32-bit bit pattern to locations 0, 4, 8, 16, 32, 64, 128, …. right up to the start of the second 32 megabytes (since the largest RAM chip on my FPGA boards is 64 meg, and the 64 meg boundary is where the program ROM starts on my ZPU variant.)  Having written the test pattern, I then write a different pattern to location zero, then check all the other locations to make sure the change hasn’t propagated through to any of the others.  As a bonus, if there are no bad address lines, this test tells me the size of the SDRAM chip in use.
  • The final test is an LFSR-based check.  I use a Linear Feedback Shift Register to generate a pseudo-random series of addresses.  To each address I write a 16-bit word containing the lower 16 bits of the address.  I do a couple of hundred thousand writes, then reset the LFSR and read the values back, checking that they’re correct.

The actual memory check program can be found in my ZPUTest github repo.

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