Continuing my experiments with the IceSugar-Pro board, building cores using Yosys and friends, I now have EightThirtyTwoDemos running, using PMODs to provide VGA out, I2S audio out, PS/2 keyboard and mouse, and SD card. (The latter isn’t strictly necessary since the FPGA board already has an SD card slot – but it’s on the underside of the board and impossible to access while the IceSugar-Pro is inserted into the carrier board.)
So how did I go about wiring up the PMODs?
2022-04-19 – Part 1: Establishing communication
If I’m going to find the problem with EightThirtyTwo that’s preventing interrupts from working, I’m going to need some way of observing what’s going on. The CPU works in GHDL Simulation, works on Altera/Intel chips, and works on Xilinx chips so there must be something I’m doing which the Open Source toolchain doesn’t like. (Or I may have stumbled upon an actual bug…)
There are basically three problems to solve here:
- Capturing the state of internal signals
- Transporting those signals to the host computer
- Displaying them in a meaningful and readable format.
I’ve been tinkering with the IceSugarPro board recently, which is a nice little SO-DIMM form factor FPGA board containing a Lattice ECP5 FPGA. It’s the successor to the earlier IceSugar board which contained a Lattice iCE40UP5k: despite not having an iCE40 series chip, the IceSugarPro retains the name!
… that the reason for the “I$” and “D$” notation when discussing instruction and data caches is the homonym between “cache” and “cash”! Now I feel very dim!
I’ve been experimenting with the QMTech Kintex7 board, which provides a huge FPGA for a less huge amount of money. The one thing that prevents my existing projects from running on it without deep changes is the lack of SDRAM, but since I’ve been wanting to get more familiar with the Xilinx ecosystem for a while, this was a good opportunity to dive in.
Achieving 24-bit colour on a 15-bit device – 2021-12-31
[I found this unfinished post in a dusty corner of my drafts folder, and decided that tonight was the night to finish it!]
While I’m sitting through the all-too-familiar wait while Quartus builds a core, I wanted to write a few words about dithering and how I approached the problem of doing 24-bit colour video output on a platform which has only 15 bits of colour resolution on its VGA port.
The video DAC on the Turbo Chameleon 64 has just 5 bits per colour gun which means we can output 32 different levels each of red, green and blue for a total range of 32,768 colours. This is fine for the ECS Minimig core, since the original Amiga has only 4 bits per gun, for a total of 4,096 colours – but the AGA chipset doubles this colour depth to 8 bits per gun, full 24-bit output – so some compromises will be needed.
Sigma Delta without Math – Part 2 – 2021-12-04
Last time around I talked about strategies for halftoning graphics, and made the key point that “noise” and “objectionable noise” are not the same thing.
I haven’t yet mentioned, though, the class of dither patterns which has been used most commonly since the advent of the desktop printer – namely Error Diffusion.
Sigma Delta without Math – Part 1 – 2021-11-10
If, like me, you’ve been curious about the best way to get good quality audio out of an FPGA, but found that all search avenues lead to impenetrable diagrams with lots of arrows, accumulators and terms like [1/z^-1] then this series is for you!
I’ve been porting the VIC20 core from MiST to TC64 recently, and since various people have asked me about the process involved in porting cores I thought I’d document the process this time.
I’ve been recording a series of screencast videos which I’ve published on Patreon, but I may as well include them here, too.
They’re not tutorials as such (since I make no claim that what I’m doing is the best or most correct way!) – they’re more of a video diary – but maybe someone will find them interesting…
I will add to the list of links as new parts are released:
Out of curiosity I recently tried to build the toolchain for ZPU – and as I rather suspected would happen, it has succumbed to the Half Life of Software, and no longer builds cleanly on up-to-date systems.
[smug mode]In the meantime, I recently succeeded in building the 832 toolchain (832a, 832l, 832d and the 832 VBCC backend) for Amiga, using the Amiga version of VBCC and the Minimig core![/smug mode]
I still have a definite soft spot for ZPU, though.