… that the reason for the “I$” and “D$” notation when discussing instruction and data caches is the homonym between “cache” and “cash”! Now I feel very dim!
It’s only just dawned on me…
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… that the reason for the “I$” and “D$” notation when discussing instruction and data caches is the homonym between “cache” and “cash”! Now I feel very dim!
2022-03-29
I’ve been experimenting with the QMTech Kintex7 board, which provides a huge FPGA for a less huge amount of money. The one thing that prevents my existing projects from running on it without deep changes is the lack of SDRAM, but since I’ve been wanting to get more familiar with the Xilinx ecosystem for a while, this was a good opportunity to dive in.
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